New 
Silicon Engineer II
 Microsoft | |
 United States, California, Santa Clara | |
 Jul 26, 2025 | |
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OverviewMicrosoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft's expanding Cloud Infrastructure and responsible for powering Microsoft's "Intelligent Cloud" mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate, high-energy engineers to help achieve that mission. The Data Processing Unit (DPU) team brings together state-of-the-art software and hardware expertise to create a highly programmable and high-performance ASIC with the capability to efficiently handle large data streams. Thanks to its integrated design, this solution empowers teams to operate with increased agility and deliver significantly superior performance compared to CPU-based alternatives We're seeking a Physical Design Engineer. As part of our DPU silicon team in Santa Clara, you'll take on all aspects of Physical Design from RTL to GDS signoff. You'll tackle key design challenges and work closely with other designers to help drive our chips to tapeout. We're working on some of the most exciting silicon projects in Microsoft, and you can help us drive our vision.
ResponsibilitiesTake full ownership of important designs and drive them tapeout, meeting all timing, physical, electrical, and manufacturing requirements:Perform early design exploration & analysis, giving feedback to RTL team on design issues, and work to resolve themResolve all floorplanning and timing issues; optimize design placement, congestion, clock tree insertion, routing, timing closurePerform all signoff activities for tapeout including timing ECOs and signoff timing closure, physical verification, EM/IR, and formal verificationWork closely with fellow team members to resolve boundary timing issues, make floorplan adjustments, and address timing issues, constraints, etc. | |