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Senior Power & Performance Engineer

Microsoft
United States, Oregon, Hillsboro
Dec 31, 2024
OverviewMicrosoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft's expanding Cloud Infrastructure and responsible for powering Microsoft's "Intelligent Cloud" mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate, high-energy engineers to help achieve that mission.As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, Cloud Computer Development Organization (CCDO) team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for seasoned engineers with a dedicated passion for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure.We are looking for a Senior Power and Performance Engineer to join the team.
ResponsibilitiesWork with business, architecture, and design teams to understand power and performance requirements and collaborate across functional teams to meet these needs in technology development planning and path finding.Work with platform, firmware, and software teams across Microsoft to identify opportunities to improve system power and performance management with a goal of improved power efficiency across the stack.Develop power and performance modeling methodology by creating and owning System on Chip (SOC) architectural power models. Project and report power constrained SOC performance results to senior management.Maintain the power modeling infrastructure, used for power constrained performance projections.Work with IP Micro-architects and RTL team to incorporate low power design methodologies and power saving techniques. Identify IP/SOC power saving opportunities and drive definition of power saving uArch features.Understand product SOC power and performance interactions with power delivery and thermal solutions at the system level.Use case profiling, cloud computing workload analysis and PnP modeling, and correlation/validation to post-silicon.Apply your growth mindset to learn and adapt in a complex and dynamic environment.
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